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Programmable component fundamentals

CYCLONE−V CORTEX−A9 HARD PROCESSOR SYSTEM

Lattice Mico32 FPGA embedded processor

Lattice Diamond

Lattice − PCIe 1.1 x1, x4 IP core

Xilinx − Virtex−5 FXT Embedded Processor Block

Xilinx − Spartan−6 / Virtex−6 Integrated PCI Express Block

Xilinx − Designing with Ethernet MAC logicores

Xilinx − Microblaze implementation

Zynq All Programmable SoC: Hardware and Software Design

Microsemi SmartFusion2 Programming

RISC−V CPU

VHDL Language

Advanced VHDL for FPGA

Design with SystemC

ac6 >> ac6-training >> Programming >> Logique Programmable

Logique Programmable

Programmation et mise en oeuvre d'électronique programmable

La réalisation de systèmes embarqués combine de plus en plus de l'électronique programmable et du logiciel. Ces deux composantes du système contribuent de façon critique au bon fonctionnement du système et doivent être conçues et maîtrisées non seulement séparément mais également dans leurs interactions. ac6-formation propose des formations pratiques pour vous permettre de maîtriser la mise en oeuvre de composants de logique programmable et leur interactions avec la composante logicielle de vos systèmes.

You can see detailed course descriptions of the various trainings by using the above navigation bar. You can also click on course identifiers in the following course briefs hereafter.

V0 - Programmable component fundamentals This training is intended to professional who want to use or maintain programmable components

This training is intended to professional who want to use or maintain programmable components

ALT1 - CYCLONE-V CORTEX-A9 HARD PROCESSOR SYSTEM This course covers the hard IPs present in Cyclone-V Intel (Altera) FPGA family, based on ARM Cortex-A9 CPU
H1 - Lattice Mico32 FPGA embedded processor Implementing and programming a processor core in an FPGA

More and more embedded applications are based on high-capacity FPGA, and integrating software requires installing a processor in the FPGA. However, this architecture has a number of specificities, both in terms of hardware architecture and programming. This training covers the entire process of installing a processor and programming it, either directly or with an embedded OS. The practical exercises will be done on a Lattice Semiconductor FPGA with a Mico32 embedded CPU running micrium uC/OSII or uClinux.

H2 - Lattice Diamond Mastering Diamond for FPGA optimisation and debug

Programming tools for FPGAs are complex environments, supporting many different tasks. It can be difficult to use them optimally and to maximize their usefulness. This course will enable you to master the Lattice Semiconductor Diamond toolset to program, simulate and debug your FPGA either in VHDL, Verilog or in mixing both languages.

H6 - Lattice - PCIe 1.1 x1, x4 IP core This course describes the implementation of the Lattice PCIe core present in ECP2M, ECP3 and SCM FPGA families
HX1 - Xilinx - Virtex-5 FXT Embedded Processor Block This course covers the parameterizing of the Embedded Processor Block present in Virtex-5 FXT Xilinx FPGAs.
HX2 - Xilinx - Spartan-6 / Virtex-6 Integrated PCI Express Block This course covers the implementation of the Xilinx PCIe block.
HX3 - Xilinx - Designing with Ethernet MAC logicores This course covers the implementation of the Ethernet MAC Xilinx logicores.
HX4 - Xilinx - Microblaze implementation This course explains how to design a SoC based on MicroBlaze, Xilinx proprietary IPs and/or custom IPs using EDK

This course explains how to design a System on Chip (SoC) based on MicroBlaze, Xilinx proprietary IPs and/or custom IPs using Embedded Development Kit (EDK)
(This Training is mainly based on labs)

HX5 - Zynq All Programmable SoC: Hardware and Software Design This course explains how to design a System on Chip (SoC) based on the Zynq-7000 All Programmable SoC
MSP - Microsemi SmartFusion2 Programming RV1 - RISC-V CPU This course covers and explains the implementation of the RISC-V CPU on FPGA platforms

This course explains the RISC-V architecture from creating high-level functional specifications to design, implementation and testing on FPGA platforms using standard hardware description and software programming languages

V1 - VHDL Language FPGA Programming with VHDL and Simulation (through the training Xilinx, Lattice or Actel FPGA are targeted)
V2 - Advanced VHDL for FPGA Acquire a strong design methodology with the best of VHDL for simulation and synthesis

This training is intended to engineers having basic knowledge in VHDL who are willing to acquire a strong designing methodology, and to take the best of VHDL language for digital system simulation and/or synthesis (through the training, Xilinx FPGAs will be targeted)

V3 - Design with SystemC System Design and Simulation with SystemC

Embedded electronic systems are more and more complex and designing them more difficult. Thus designing the hardware and the software separately becomes quite impractical. The SystemC language has been designed to design and simulate entire systems, both the hardware and software parts, even before its partitioning.