TI SoCs

Texas Instruments builds embedded processors that span single Cortex-M microcontrollers up to the multicore KeyStone devices combining ARM cores with C66x DSPs. Each family comes with its own memory architecture, interconnect and boot sequence.

Our courses cover the Cortex-M4 platform with TI-RTOS and the KeyStone II architecture: core and DSP subsystems, Multicore Navigator, memory hierarchy, peripherals and boot modes. Both hardware implementation and software development are covered, with lab work on real boards.

On KeyStone the difficulty is the interconnect, not the cores: Multicore Navigator queues, packet DMA, and the memory hierarchy across L1, L2 and the shared MSMC. On the Cortex-M side it is TI-RTOS, its scheduler and its driver model. Both are covered with lab work on real boards.