STM32
Courses on ST processors based on ARM cores
STM32 covers an unusually wide range for a single microcontroller family, from the ultra-low-power L0 and U5 up to the H7 and the Linux-capable MP1 and MP2. The peripherals stay recognizable across families, which is what makes moving a design from one series to another realistic.
That consistency comes from the tooling as much as from the silicon. STM32CubeMX generates the clock tree and pin configuration, HAL and LL give two levels of driver abstraction, and the middleware layers bring FreeRTOS, LwIP, USB and file systems in without rewriting them. The work then shifts to what actually matters: clock design, DMA, low-power strategy and boot configuration.
Our courses cover the families in use today, series by series, along with the peripherals shared across them, TrustZone-M security on the L5, H5 and U5, the wireless parts, and the complete case of an STM32 running FreeRTOS and a TCP/IP stack at the same time.
Available Courses
This course goes through STM32F7 step by step: the Cortex-M7 core, AXI/TCM and caches, clock tree, and key peripherals (DMA, timers, ADC). It then adds communications (USART, I²C, SPI/I²S/SAI), storage and memory (SDMMC/FatFS, QSPI XIP, FMC SDRAM), and connectivity (Ethernet, USB OTG FS/HS). Low-power, boot/Option Bytes, and robustness (MPU, watchdogs, reset causes) are covered with hands-on labs.
This course goes through STM32H7 step by step: the Cortex-M7 core, AXI/TCM memory and caches, clock tree, and key peripherals (DMA/MDMA, timers, ADC). It then covers communications (USART, I²C, SPI), storage (optional SDMMC/FatFS), and low-power across H7’s power domains. Boot and Option Bytes (incl. dual-bank) and robustness (MPU, watchdogs, reset causes) are introduced in a practical way
This course goes through STM32H5 step by step: the Arm Cortex-M33, memory and dual-bank Flash, the clock tree, and performance-minded drivers (timers, GPDMA). It then covers communications (USART, I²C, SPI), optional storage (SDMMC/FatFS), and low-power. We introduce H5's security stack: TrustZone-M, STM32Trust Secure Manager, and TF-M.
This course goes through the STM32U5 (Cortex-M33) step by step: core architecture, clocks/resets, memory, and key peripherals (GPIO, timers, DMA, UART/I²C/SPI, ADC). It then applies low-power techniques with real measurements, and introduces TrustZone-M and basic secure-boot concepts. About half the time is hands-on with STM32CubeIDE/MX/Programmer on STM32U5 boards.
This course goes through STM32G0 step by step: the Cortex-M0+ core, memory map and option bytes, the clock/reset tree, and key peripherals (DMA/DMAMUX, timers, ADC with oversampling, COMP). It then covers communications (USART/LPUART, I²C, SPI), low-power modes (Sleep/Stop/Standby with RTC/LPTIM), and storage practices (Flash layout, EEPROM emulation). Variant-specific blocks are introduced pragmatically: UCPD (USB-C/PD), USB FS device, and CAN-FD on G0B1/C1, along with robustness topics (CRC, watchdogs, reset causes) and safe boot/configuration via option bytes (RDP/PCROP).
his course walks through STM32G4 step by step: the Cortex-M4F core with DSP/FPU, clock tree, timers, DMA/DMAMUX, and the G4’s analog and control toolset: fast ADCs, OPAMP/COMP, DAC, and HRTIM. We also cover CORDIC and FMAC accelerators, serial interfaces, low-power timing (LPTIM/RTC), and production topics (Flash/Option Bytes, watchdogs). Hands-on labs show practical bring-up, high-rate acquisition, PWM-ADC coupling, and control-loop building blocks.
This course walks through STM32L0 step by step: Cortex-M0+ core, MSI/HSI16 clocking, timers and LPTIM, DMA, and the L0 analog set (ADC, COMP). We add communications (USART/LPUART, SPI, I²C), RTC and deep Stop/Standby, plus production topics: Flash, true Data EEPROM, Option Bytes, boot/ROM DFU, and watchdogs. Labs focus on low-power bring-up, tickless timing, and robust I/O.
A practical tour of STM32L1: Cortex-M3 basics, clock/power, timers, DMA, ADC, and comms. We add RTC + deep low-power, and production topics: Data EEPROM, Option Bytes, boot, watchdogs. Optional labs cover USB FS, LCD segment driver, and TSC where available.
Step-by-step STM32L4/L4+ bring-up: Cortex-M4F core, MSI-centric clocking, timers/LPTIM, DMA/DMAMUX, and the rich analog set (fast ADC, COMP, OPAMP, DAC). We add robust comms, RTC/tickless, storage (SDMMC/FatFS, QSPI/OSPI), and USB FS. Low-power design and production hardening (Option Bytes, watchdogs, reset logs) are covered with hands-on labs.
This course goes step-by-step through STM32L5 with TrustZone-M: core concepts, TZ partitioning (SAU/GTZC), Secure/Non-Secure project bring-up, and RCC.
A hands-on tour of STM32WB wireless MCUs: dual-core architecture, FUS/stack management, BLE GAP/GATT development, and Thread/Zigbee bring-up. You’ll control the IPCC link, build services with security and notifications, commission 802.15.4 nodes, try multiprotocol, and practice OTA/DFU, low-power, and production RF checks.
Hands-on STM32WL radio bring-up: SoC + RF path, CubeWL projects, LoRa PHY and LoRaWAN Class A with OTAA, ADR, RX windows, and downlinks. We add low-power, regional settings, RF tuning, and a production checklist (keys, NVM, regulatory notes).
Hands-on STM32WBA wireless bring-up: SoC overview, CubeWBA projects, GAP/GATT development, security/bonding, Extended & Periodic Advertising, BLE 5.4 (PAwR, Encrypted Advertising Data), Coded PHY range tests, and OTA/DFU. You’ll tune power, measure throughput, and finalize a production checklist.
A hands-on deep dive into STM32MP2: dual Cortex-A35 + Cortex-M33 bring-up with OpenSTLinux (Yocto), full boot chain (TF-A → OP-TEE → U-Boot → Linux), DDR/clock and device-tree tuning, graphics (GPU/VPU), camera/display (CSI-2/DSI), connectivity (Ethernet/TSN, USB, PCIe), and edge-AI on the NPU. You’ll also build an M33 real-time side with OpenAMP/RPMsg, set up secure boot/keys, and practice OTA/rollback and production hardening.
FreeRTOS is a lightweight, real-time operating system (RTOS) designed to efficiently manage tasks in embedded applications. The Real Time Programming with FreeRTOS course delves into the design and implementation of real-time applications using FreeRTOS. Covering essential topics such as task scheduling, synchronization, and memory management, this course equips professionals with the skills necessary to develop reliable and efficient real-time systems. Ideal for developers with a basic understanding of real-time systems and programming concepts, it provides a solid foundation in FreeRTOS development, enabling participants to design, implement, and debug robust embedded applications.