FlexRay 2.1 Training | Ac6 Training

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IA2FlexRay 2.1
This course covers the FlexRay specification version 2.1

Objectives

  • The course details the hardware implementation and describes the tests required to check the compliance of an equipment.
  • The communication scheme which enables both Time and event-triggered communications is explained.
  • The course focuses on error recovery mechanisms.
  • Implementation examples are described through NXP and Philips existing devices.
A Lecroy analyser is used to capture and display FlexRay traffic.
•  A lot of traces are included in the material.
A more detailed course description is available on request at training@ac6-training.com
  • Experience of a digital bus is mandatory.
  • Theoretical course
    • PDF material in English (printed for face-to-face); online over Teams.
    • Trainer assistance throughout.
  • Each session starts with a trainee check-in.
  • Any embedded systems engineer or technician with the above prerequisites.
  • Prerequisites are checked before the training.
  • Progress is assessed by quizzes at the end of sections.
  • Each trainee receives a completion certificate.
  • If a prerequisite gap appears, alternative or additional training is offered.

Course Outline

  • History, X-by-Wire
  • Possible topologies
  • Deterministic data transmission
  • Partitioning
  • Security mechanisms
  • Time and event-triggered communications
  • Synchronized time-bases on macrotick basis
  • Time division, slot duration and slot number configuration
  • FTDMA dynamic part of a communication cycle
  • Mini-slot allocation
  • Frame format
  • Message oriented addressing via identifiers
  • Symbol transmission
  • Bus controller
  • SPI interface
  • CPU parallel interface
  • Node wake-up, power saving mode
  • Media Access Control
  • Fault-tolerant and time-triggered services
  • Repetitive vs spontaneous message scheduling
  • Dedicated online diagnosis services
  • Redundant transmission channels
  • Robust coding and bit recognition scheme
  • Error detection and signaling
  • Fault confinement in the Time Domain, Bus Guardian
  • Signal level and bit representation
  • Transmission medium
  • Fault confinement
  • Error detection and signalling
  • Message validation
  • Message framing
  • Scheduling and access control
  • Status signalling
  • Frame and data handling
  • Frame filtering and masking
  • Stopping communication
  • Loss of synchronization
  • Degradation concept
  • Immediate passivation
  • Error signalling
  • Compliance checklists
  • Physical layer testing
  • Protocol conformance verification
Duration
2 days
Inquiry

This course can be scheduled upon request. Click the 'Inquire' button to contact us.

More

To book a training session or for more information, please contact us on info@ac6-training.com.

Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.

You can also fill and send us the registration form

This course can be provided either remotely, in our Paris training center or worldwide on your premises.

Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.

Last update of course schedule: 27 June 2026

Booking one of our trainings is subject to our General Terms of Sales

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