HX3
Xilinx - Designing with Ethernet MAC logicores
This course covers the implementation of the Ethernet MAC Xilinx logicores.
Objectives
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- Knowledge of Ethernet is recommended, see our course reference N1.
- Experience with Xilinx ISE and EDK software tools is recommended.
- Theoretical course
- PDF material in English (printed for face-to-face); online over Teams.
- Trainer assistance throughout.
- Each session starts with a trainee check-in.
- Any embedded systems engineer or technician with the above prerequisites.
- Prerequisites are checked before the course starts, against the prerequisites published on this page.
- Throughout the course, learning is assessed continuously: end-of-section quizzes and direct observation by the trainer.
- At the end of the course, each participant receives a training completion certificate.
Course Outline
- Ethernet basics
- Network protocols
- Lab1 : Analyzing Ethernet frames
- Physical layer
- Local Link interface
- Lab2 : VLAN and Jumbo frames
- Xilinx EMAC solutions
- Lab3 : Implementation
- EMAC and EMAC lite
- Lab4 : EMAC peripheral in loopback mode
- GEMAC
- TEMAC
- Lab5 : TEMAC in loopback mode
- 10GE MAC
- Lab6 : Analyzing 10GE MAC frames
More
To book a training session or for more information, please contact us on info@ac6-training.com.
Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.
You can also fill and send us the registration form
This course can be provided either remotely, in our Paris training center or worldwide on your premises.
Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.
Last update of course schedule: 27 June 2026
Booking one of our trainings is subject to our General Terms of Sales
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