ARCHITECTURE OF LPC17XX MCUs
- ARM core based architecture
- Description of LPC17XX and LPC13XX SoC architecture
- Clarifying the internal data and instruction paths: AHB-lite interconnect, peripheral buses, AHB-to-APB bridges
- Integrated memories
- SoC mapping
THE ARM CORTEX-M3 CORE
- V7-M core family
- Core architecture
- Programming
- Exception behavior, exception return
- Basic interrupt operation, micro-coded interrupt mechanism
- Wakeup Interrupt Controller
- Memory Protection Unit
BECOMING FAMILIAR WITH THE IDE
- Acsys covers 3 IDEs: Keil, IAR and GCC / Lauterbach.
- Thus the customer has just to indicate which one he has chosen
- Getting started with the IDE
- Creating a project from scratch
- C start program
PROGRAMMING AND DEBUGGING
- Debug interface
- Programming
RESET, POWER AND CLOCKING
- Power control
- Reset
- Clocking
- Low power modes
INTERNAL INTERCONNECT
- AHB multi-layer matrix
- DMA
HARDWARE IMPLEMENTATION
- Power pins
- Pinout
- GPIO module
- External Interrupts
INTEGRATED MEMORIES
- Embedded flash memory
- On-chip static SRAM
TIMERS
- Timers 0, 1, 2 and 3
- PWM
- Motor Control PWM
- Quadrature Encoder Interface
- Real Time Clock and backup registers
- Watchdog timer
ANALOG MODULES
- 12-bit Analog-to-Digital Converter
- 10-bit Digital-to-Analog Converter
CONNECTIVITY AND COMMUNICATION
- SPI
- SSP interfaces
- I2S interface
- UART
- I2C
- CAN controllers
- USB FS
- Fast ethernet
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