ARM TrustZone for Cortex-M based devices Training | Ac6 Training

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oSEC7ARM TrustZone for Cortex-M based devices
Objectives
  • Understand the ARM v8-M architecture and its security features
  • Learn about ARMv8-M Memory Protection mechanism enhancement
  • Configuring the Security Attribution unit
  • How to manage Security access faults
  • How to build and debug a secure and non-secure software
  • Students will be given access to a shared filesystem to save and share their work.
  • PDF course material
  • The labs will use a ARM Cortex-M33 based board
  • Programming skills: Some programming experience, particularly in C
  • Basic knowledge of ARM Cortex-M implementations
  • Basic understanding of Security Algorithms and Secure coding
  • Any embedded systems engineer or technician with the above prerequisites.
  • The prerequisites indicated above are assessed before the training by the technical supervision of the traineein his company, or by the trainee himself in the exceptional case of an individual trainee.
  • Trainee progress is assessed in two different ways, depending on the course:
    • For courses lending themselves to practical exercises, the results of the exercises are checked by the trainer while, if necessary, helping trainees to carry them out by providing additional details.
    • Quizzes are offered at the end of sections that do not include practical exercises to verifythat the trainees have assimilated the points presented
  • At the end of the training, each trainee receives a certificate attesting that they have successfully completed the course.
    • In the event of a problem, discovered during the course, due to a lack of prerequisites by the trainee a different or additional training is offered to them, generally to reinforce their prerequisites,in agreement with their company manager if applicable.

Course Outline

  • Overview of ARM TrustZone technology
  • TrustZone Architecture
    • Overview of the TrustZone architecture
    • TrustZone-enabled processors and their features
    • Secure world and non-secure world
  • TrustZone security
    • Overview of TrustZone security model
    • TrustZone-enabled Cortex-M
  • Secure Software Design Considerations
  • Memory types
  • Access order
  • Memory barriers, self-modifying code
  • Memory protection overview, ARM v8 PMSA
  • Cortex-M33 MPU and bus faults
  • Region overview, memory type and access control
  • Setting up the MPU
Exercise:  Use the MPU to protect an area of memory against unintended access
  • TrustZone-enabled Cortex-M processors and their features
  • Security states
  • Register banking between security states
  • Stacks and security states
  • Security Extension and exceptions
  • Secure and Non-Secure states interactions
  • Exceptions and the Security Extension
    • Handling Secure Exceptions
    • Handling Non-Secure Exceptions while in the Secure state
    • Returning from a Non-Secure exception to the Secure state
  • The Security Attribution Unit (SAU)
  • The Implementation Defined Attribution Unit (IDAU)
  • Debugging TrustZone-enabled Cortex-M processors
Exercise:  Implementing a minimal secure monitor
Exercise:  Programming and Debugging a TrustZone application example
Duration
6 hours
Inquiry

This course can be scheduled upon request. Click the 'Inquire' button to contact us.

More

To book a training session or for more information, please contact us on info@ac6-training.com.

Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.

You can also fill and send us the registration form

This course can be provided either remotely, in our Paris training center or worldwide on your premises.

Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.

Last update of course schedule: 23 February 2026

Booking one of our trainings is subject to our General Terms of Sales

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