ARCHITECTURE OF STM32F0 MCUs
- ARM core based architecture
- Description of STM32F050X and STM32F051X SoC architecture
- Clarifying the internal data and instruction paths: AHB-lite interconnect, peripheral buses, AHB-to-APB bridges
- Private Peripheral Bus (PPB)
- Integrated memories
- SoC mapping
THE ARM CORTEX-M0 CORE
- V6-M core family
- Core architecture
- Programming
- Exception behavior, exception return
- Basic interrupt operation, micro-coded interrupt mechanism
BECOMING FAMILIAR WITH THE IDE
- Acsys covers 3 IDEs: Keil, IAR and GCC / Lauterbach
- Thus the customer has just to indicate which one he has chosen
- Getting started with the IDE
- Parameterizing the compiler / linker
- Creating a project from scratch
- C start program
PROGRAMMING AND DEBUGGING
- Debug interface
- Programming
RESET, POWER AND CLOCKING
- Power control
- Reset
- Clocking
- Low power modes
INTERNAL INTERCONNECT
HARDWARE IMPLEMENTATION
- Power pins
- Pinout
- GPIO module
- System configuration controller
- External Interrupts
INTEGRATED MEMORIES
- Embedded flash memory
- Internal SRAM
TIMERS
- Advanced-control timers TIM1
- General-purpose timers (TIM2 and TIM3)
- General-purpose timers (TIM14-17)
- Basic timers (TIM6)
- Real Time Clock
- Independent Watchdog
- Window Watchdog
ANALOG MODULES
- 12-bit Analog-to-Digital Converter and Programmable Gain Amplifier
- 12-bit Digital-to-Analog Converter
- Comparator
INTEGRITY
CONNECTIVITY AND COMMUNICATION
- SPI
- SPI in I2S mode
- USART
- I2C
OTHER INTERFACES
- Touch sensing interface
- HDMI-CEC
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