Training TI STELLARIS CORTEX-M3 BASED MCUs IMPLEMENTATION: This course covers all MCUs belonging to the Stellaris Cortex-M3 family, X00, 1000, 2000, 3000, 5000, 8000 & 9000 SERIES

TI1TI STELLARIS CORTEX-M3 BASED MCUs IMPLEMENTATION
This course covers all MCUs belonging to the Stellaris Cortex-M3 family, X00, 1000, 2000, 3000, 5000, 8000 & 9000 SERIES
Objectives
  • This course has 5 main objectives:
    • Describing the hardware implementation and highlighting the pitfalls
    • Describing the ARM Cortex-M3 core architecture
    • Becoming familiar with the CCS or Keil IDE and low level programming.
    • Describing the units which are interconnected to other modules, such as clocking, interrupt controller and DMA controller, because the boot program generally has to modify the setting of these units
    • Describing independent I/O modules and their drivers developed by TI (DriverLib).

  • Note that this course has been designed from the architecture of the most complex STELLARIS device, the LM3S9B96
    • Consequently, a chapter has been designed by Acsys for each possible integrated IP
    • According to the actual reference chosen by the customer, some chapters may be removed.

  • Products and services offered by ACSYS:

  • ACSYS is able to assist the customer by providing consultancies
    • Typical expertises are done during board bringup, hardware schematics review, software debugging, performance tuning.
    • ACSYS has also an expertise in FreeRTOS porting and uIP /LWIP or Interniche stack integration.

A lot of programming examples have been developed by ACSYS to help the attendee to become familiar with the CCS IDE.
A more detailed course description is available on request at training@ac6-training.com
This document is necessary to tailor the course to specific customer needs and to define the exact schedule.

  • Theoretical course
    • PDF course material (in English) supplemented by a printed version for face-to-face courses.
    • Online courses are dispensed using the Teams video-conferencing system.
    • The trainer answers trainees' questions during the training and provide technical and pedagogical assistance.
  • At the start of each session the trainer will interact with the trainees to ensure the course fits their expectations and correct if needed
  • Any embedded systems engineer or technician with the above prerequisites.
  • The prerequisites indicated above are assessed before the training by the technical supervision of the traineein his company, or by the trainee himself in the exceptional case of an individual trainee.
  • Trainee progress is assessed by quizzes offered at the end of various sections to verify that the trainees have assimilated the points presented
  • At the end of the training, each trainee receives a certificate attesting that they have successfully completed the course.
    • In the event of a problem, discovered during the course, due to a lack of prerequisites by the trainee a different or additional training is offered to them, generally to reinforce their prerequisites,in agreement with their company manager if applicable.

Course Outline

  • ARM core based architecture
  • Description of Series 1000, 2000, 3000, 5000, 8000 and 9000 SoC architecture
  • Clarifying the internal data and instruction paths
  • Highlighting possible concurrent transactions
  • Integrated memories
  • SoC mapping
  • V7-M core family
  • Core architecture
  • Programming
  • Exception behavior, exception return
  • Basic interrupt operation, micro-coded interrupt mechanism
  • Memory Protection Unit
  • Getting started with the IDE
  • Parameterizing the compiler / linker
  • Creating a project from scratch
  • C start program
  • IEEE 1149.1-1990 compatible Test Access Port (TAP) controller
  • Integrated ARM Serial Wire Debug
  • Reset
  • Clocking
  • Power control
  • Bus matrix
  • µDMA
  • Power pins
  • Pinout
  • GPIO module
  • Flash memory, this module is not implemented in all STELLARIS devices
  • Internal SRAM
  • Internal ROM
  • Host bus
  • General purpose interface
  • DRAM controller
  • General Purpose Timer Module block
  • Capture Compare PWM pins
  • Watchdog timers
  • Advanced Motion Control
  • 10-bit Analog-to-Digital Converter and Programmable Gain Amplifier
  • Analog comparators
  • SSI
  • UART
  • I2C
  • CAN modules
  • USB
  • Fast ethernet with IEEE1588
  • ISO7816 smartcard interface
  • I2S audio interface
    • Using the drivers developed by TI to implement these IO ports (I2C, SPI, UART, USB)
Duration
5 days
Inquiry

This course can be scheduled upon request. Click the 'Inquire' button to contact us.

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