This course covers both Cortex-M0 and Cortex-M0+ ARM CPUs
Objectives
This course is split into 3 important parts:
Processor architecture
Software implementation
Hardware implementation.
A tutorial has been developed by ACSYS to facilitate the understanding of Cortex-M0 low level programming, therefore labs can be replayed after the course.
The course explains how to design a SoC based on Cortex-M0 / Cortex-M0+, clarifying the operation of the interconnect and the debug facilities integrated in the CPU.
This training has been delivered several times to companies developing SoCs for wireless / consumer market.