INTRODUCTION TO MIPI SPECIFICATIONS
M-PHY
- Termination scheme
- Signaling schemes
- Pulse Width Modulation
- M-PHY type I modules
- Embedding clock into the bitstream, 8b10b coding
- Control symbols
- PHY state definition
- Transitions between states
- HS-MODE BURST Operation
- Configuration attributes
- Test modes
- Electrical characteristics, eye-diagrams
- Recommended test functionality
- Optical Media Converter
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DEVICE DESCRIPTOR BLOCK (DDB)
- Services to transfer descriptor and configuration data between devices on a MIPI Interconnect
- Underlying interconnect requirements
- Accessing DDB Services through DDB Service Access Points
- DDB-PDU format
- DDB protocol support for Level 1 and Level 2 services
LOW LATENCY INTERFACE (LLI)
- Objectives: accessing an external device exactly like a local IP, using memory-mapped transactions
- Power management, Automatic Save State
- M-PHY Adapter layer
- Data link layer, independent flow control using Traffic Classes
- Transaction layer, configuration space, ordering rules
- Device enumeration
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