- The course details the hardware implementation and clarifies the operation of 8b10b encoder/decoder.
- All tests required to qualify the physical layer are detailed.
- The course also covers the PIPE interface, which is used to interconnect the Link layer and the PHY.
- A lot of sequences are used to explain the flow control mechanism, the error recovery mechanism and packet acknowledgment.
- The dual operation of USB 2.0 and USB 3.0 is clarified, especially the initialization sequence used by the device to select the operation speed.
- The course explains all requirements regarding low power management, particularly the consequences on hub design.
- The enumeration is studied step by step.
- The one-day part on xHCI, UAS and AV classes are covered on request only.
- Note that this course is a mature course already delivered to main companies developing SoCs for wireless solutions.