This course describes the i.MX6 Dual and Quad core SoC
OBJECTIVES
The course details the hardware implementation of the i.MX6 SoC.
The course focuses on the boot sequence, the clocking and the power management strategies.
The course explains all parameters that affect the performance of the system in order to easily perform the final tuning.
The multiple complex units involved in multimedia management are covered in depth.
An overview of the Cortex-A9MP core helps to understand issues caused by MMU, cache and snooping.
Interrupt management through ARM GIC is explained through a lab.
The course also covers the hardware implementation, particularly the DDR3 and NAND flash controllers.
Note that these course outlines cover all units within the i.MX6
According to the actual reference chosen by the customer, some chapters may be removed.
Products and services offered by ACSYS:
ACSYS is able to assist the customer by providing consultancies. Typical expertises are done during board bringup, hardware schematics review, software debugging, performance tuning.
This course is only provided on-demand; A more detailed course description is available on request at training@ac6-training.com
This document is necessary to tailor the course to the specific customer needs and to define the exact schedule.
Prerequisites and related courses
This course provides only an overview of the Cortex-A9MP