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N3 Ethernet 10 Gigabit

This course covers IEEE802.3 Ethernet 10 gigabit and SFP+

  • This course explains the theory of Ethernet 10 Gigabit from IEEE802.3 standard.
  • Implementation examples are provided for MAC and PHY.
  • The hardware interfaces are fully detailed: XGMII, XAUI, XSBI and XFP+.
  • The course describes the purpose of each unit present in the transmit and receive path.
  • Software aspects, such as 10GBASE-T autonegotiation and more generally registers implemented in PHY sublayers are also covered.
  • The course details the implementation of 10G Ethernet for backplanes, clarifying 10GBASE-KR FEC, training and autonegotiation.
A more detailed course description is available on request at
  • Theoretical course
    • PDF course material (in English) supplemented by a printed version for face-to-face courses.
    • Online courses are dispensed using the Teams video-conferencing system.
    • The trainer answers trainees' questions during the training and provide technical and pedagogical assistance.
  • At the start of each session the trainer will interact with the trainees to ensure the course fits their expectations and correct if needed
  • Any embedded systems engineer or technician with the above prerequisites.
  • The prerequisites indicated above are assessed before the training by the technical supervision of the traineein his company, or by the trainee himself in the exceptional case of an individual trainee.
  • Trainee progress is assessed by quizzes offered at the end of various sections to verify that the trainees have assimilated the points presented
  • At the end of the training, each trainee receives a certificate attesting that they have successfully completed the course.
    • In the event of a problem, discovered during the course, due to a lack of prerequisites by the trainee a different or additional training is offered to them, generally to reinforce their prerequisites,in agreement with their company manager if applicable.

Course Outline

  • Clarifying the various types of Ethernet 10G PHYs
  • Maintaining backwards compatibility with Ethernet 10/100/1000 Mbps
  • Full duplex only operation
  • MAC frame assembly
  • XGMII transfer protocol, the 4 Bytes lanes
  • XAUI electrical interface, delay constraints
  • Extension to this Clause 22 specification
  • MDIO Manageable Device
  • Electrical interface
  • PCS and PMA sublayers
    • 8b/10b coding
    • PCS code-groups, utilization of control characters for signalling
    • Control code groups
    • SKIP sequence
    • Introduction to transmission on optical fiber
    • Wave Division Multiplexing
    • Using a twinaxial cable
    • Test fixture characteristics
  • 10GBASE-W/R PCS layer
    • Block formats
    • 64b-66b encoder
    • Scrambler
    • Test pattern functionality
  • WAN Interface Sublayer (10GBASE-W)
    • Introduction to SONET / SDH
    • Framing, scrambling, defect/anomaly detection
    • Mapping of data-units from the PCS into the payload capacity of a STS-192c SPE
    • Receiver, delineation of octet boundaries, checking the BIP octets
    • Error propagation
  • PMA type serial
    • XSBI interface
    • Signal detect handling
    • Link power budgets
    • Tests
    • PMD registers
  • APM QT2035 SFI/XFI-XAUI PHY and S19235 SONET/SDH transceiver
  • Chromatic dispersion
  • Polarization dispersion
  • Modal dispersion
  • Equalization algorithms
  • Linear vs Limiting electrical interface
  • Preferred launch, alternative launch
  • Fiber types
  • Measurement methods
  • 16-level PAM signaling
  • Two-dimensional (2D) symbols
  • 2D symbol selection from a constrained constellation of 128 maximally spaced 2D symbols
  • 65-bit block formats
  • Link training, master / slave operation
  • Scrambling
  • Signaling, forward error correction
  • Test pattern generators
  • PMA stages
  • Compensating for signal attenuation
  • 10GBASE-T PHY specific registers
  • Auto-negotiation, page utilization
  • MDI specification, automatic MDI/MDI-X configuration
  • Test modes, test fixtures
  • Low speed electrical and power specification
  • High speed electrical specification
  • I2C interface
  • Introduction to 10G backplane clauses
  • 10GBASE-KX4
  • 10GBASE-KR
  • Autonegotiation for Ethernet backplanes
  • Forward Error Correction (FEC)