MC4Multi-Core Programming with OSEK/VDX and AutoSAR
Programming real-time and multi-core systems, avoiding common pitfalls
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Goals
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- Linux PC for each group of 2 trainees
- Embedded target board
- Cross compiler toolchain and debugger
- Course slides hardcopy
- Labs manual hardcopy
- Good knowledge of embedded C programming
- Basic understanding of processor architecture
- The exercises focus on using the mechanisms available to solve traditional problems: Readers-writers, producer-consumer, the dining philosophers, ...
- Each exercise includes a detailed explanation and a diagram which helps to understand how the algorithm works.
- For each exercise there an almost complete code is provided, with parts to complete; this allows, after a phase of understanding of the provided code, to implement features that usually take hours to design.
- The course includes optional exercises to deepen understanding.
- Any embedded systems engineer or technician with the above prerequisites.
- The prerequisites indicated above are assessed before the training by the technical supervision of the traineein his company, or by the trainee himself in the exceptional case of an individual trainee.
- Trainee progress is assessed in two different ways, depending on the course:
- For courses lending themselves to practical exercises, the results of the exercises are checked by the trainer while, if necessary, helping trainees to carry them out by providing additional details.
- Quizzes are offered at the end of sections that do not include practical exercises to verifythat the trainees have assimilated the points presented
- At the end of the training, each trainee receives a certificate attesting that they have successfully completed the course.
- In the event of a problem, discovered during the course, due to a lack of prerequisites by the trainee a different or additional training is offered to them, generally to reinforce their prerequisites,in agreement with their company manager if applicable.
Course Outline
- Tasks and task descriptors
- Context switch
| Exercise: | Write a context switch routine | |
- Task scheduling and preemption
- Tick based or tickless scheduling
- Scheduling systems and schedulability proofs
- Fixed priority scheduling
- RMA and EDF scheduling
- Adaptive scheduling
| Exercise: | Write a simple, fixed priority, scheduler | |
- Need for interrupts in a real time system
- Time interrupts
- Device interrupts
- Level or Edge interrupts
- Hardware and software acknowledge
- Interrupt vectoring
| Exercise: | Write a basic interrupt manager | |
- Interrupts and scheduling
| Exercise: | Extend the scheduler to also support real-time round-robin scheduling | |
- Cache coherency
- Snooping basics
- Snoop Control Unit: cache-to-cache transfers
- MOESI state machine
- Memory Ordering and Coherency
- ut-of-order accesses
- Memory ordering
- Memory barriers
- DMA data coherency
- Multicore data access
- Read-Modify-Write instructions
- Linked-Read/Conditional-Write
- Multicore synchronization
- Spinlocks
- Inter-Processor Interrupts
| Exercise: | Writing a spinlock implementation | |
- Multicore scheduling
- Assigning interrupts to processors
- Multi-core scheduling
- Multicore optimization
- Cache usage optimization
- Avoiding false sharing
- Avoiding cache spilling
| Exercise: | Study of a multi-core scheduler | |
- Waiting and waking up tasks
- Semaphores
| Exercise: | Implement Semaphores by direct interaction with the scheduler | |
- Mutual exclusion
- Spinlocks and interrupt masking
- Mutexes or semaphores
| Exercise: | Implement the mutex mechanism | |
- Recursive and non-recursive mutexes
| Exercise: | Check proper nesting of mutexes and recursive/non-recursive use | |
- The priority inversion problem
- Priority inheritance (the automagic answer)
- Priority ceiling (the design centric answer)
| Exercise: | Implement a priority ceiling mechanism | |
- Mutexes and condition variables
| Exercise: | Add Condition variable support to the mutex mechanism | |
- Mailboxes
- The various sequencing problems
- Uncontrolled parallel access
| Exercise: | The producre-consumer problem, illistrating (and avoiding) concurrent access problems | |
- Deadlocks
- Livelocks
- Starvation
| Exercise: | The philosophers dinner problem, illustrating (and avoiding) deadlock, livelock and starvation | |
- Task management
- Basic tasks
- Extended tasks
- Scheduling policies
- Task activation and termination
- Interrupt processing
- Events
- Resources
- Autosar multicore architecture
- Autosar Locatable Entities
- Enhancements to the OSEK scheduling
- Autosar spinlocks
- The Inter OS-Application Communicator
- Migrating Autosar application to multicore
More
To book a training session or for more information, please contact us on info@ac6-training.com.
Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.
You can also fill and send us the registration form
This course can be provided either remotely, in our Paris training center or worldwide on your premises.
Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.
Last update of course schedule: 23 February 2026
Booking one of our trainings is subject to our General Terms of Sales
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