- This course has 5 main objectives:
- Describing the hardware implementation and highlighting the pitfalls
- Describing the ARM Cortex-M4 core architecture
- Becoming familiar with the IDE and low level programming
- Describing the units which are interconnected to other modules, such as clocking, interrupt controller and DMA controller, because the boot program generally has to modify the setting of these units
- Describing independent I/O modules and their drivers.
- Note that this course has been designed from the architecture of the most complex Kinetis device, the K60.
- Consequently, a chapter has been designed by Acsys for each possible integrated IP.
- So the customer can build its own course outlines from the topics described hereafter.
- Products and services offered by ACSYS:
- ACSYS has developed FFTs (floating-point and fixed-point) optimized for ARM cores, based on SIMD instructions supported by the Cortex-M4.
- Contact email@example.com to obtain informations about the performance of these FFTs.
- ACSYS is able to assist the customer by providing consultancies. Typical expertises are done during board bringup, hardware schematics review, software debugging, performance tuning.
- ACSYS has also an expertise in FreeRTOS or MQX porting and uIP /LWIP stack or Interniche stack integration.
|A lot of programming examples have been developed by ACSYS to help the attendee to become familiar with the IDE he has chosen.
|That is why the labs included in this course can be compiled and executed under 3 possible IDEs: IAR, CodeWarrior and GCC / Lauterbach Trace32.
|A more detailed course description is available on request at firstname.lastname@example.org
|This document is necessary to tailor the course to specific customer needs and to define the exact schedule.