OS3FreeRTOS Programming
Programming applications using the FreeRTOS operating system
Objectives
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- Example code, labs and solutions are provided to the attendees.
- An ARM-based target board (Cortex/M) with a JTAG probe.
- For open courses labs are done on STM32 boards using Sytem Workbench for STM32.
- For on site courses, the customer may select Keil or IAR IDEs.
- Familiarity with embedded C concepts and programming
- Basic knowledge of embedded processors
- Any embedded systems engineer or technician with the above prerequisites.
- Prerequisites are checked before the training.
- Progress is assessed by quizzes at the end of sections.
- Each trainee receives a completion certificate.
- If a prerequisite gap appears, alternative or additional training is offered.
Course Outline
- Introduction to FreeRTOS
- The FreeRTOS architecture and features
- The FreeRTOS license
- Getting FreeRTOS source code
- Files and directories structure
- The demo applications
- Data types and coding style
- Naming conventions
- FreeRTOS on the Cortex/M processors
- The Task life-cycle
- Creating tasks
- Deleting tasks
- The Endless-loop pattern
- Task Priorities
- Assigning task priorities
- Changing task priorities
- The idle task
- Idle task hooks
- Deterministic preemptive scheduling
- Scheduling strategies
- Cyclic scheduling (RMA)
- Deadline scheduling
- Cooperative scheduling
- Hybrid scheduling
- Purpose of queue management
- Basic use
- Creation
- Sending on a queue
- Receiving from a queue
- Data management
- Sending compound types
- Transfering large data
- Mutual exclusion
- Mutexes and binary semaphores
- Deadlocks
- Priority inversion
- Priority inheritance
- Critical sections
- Critical sections
- Suspending (locking) the scheduler
- Gatekeeper tasks
- FreeRTOS-provided memory allocation schemes
- Allocate-only scheme
- Best-fit without coalescing
- Thread-safe default malloc
- Checking remaining free memory
- Adding an application-specific memory allocator
- FreeRTOS interrupt processing
- Writing ISRs in C
- Interrupt safe functions
- Interrupt nesting
- Deferred interrupt processing
- Using semaphores within an ISR
- Counting semaphores
- Using queues within an ISR
- Tasks with interrupt synchronization
- The timer daemon task
- Timer configuration
- One-Shot and Auto-reload timers
- The Software Timer API
- Checking for stack problems
- Common pitfalls
- The Cortex/M MPU
- User and privileged modes
- Access permissions
- Defining MPU regions
- Overlapping regions
- Predefined regions
- Programmer-defined regions
- Needed linker configuration
- Practical usage tips
More
To book a training session or for more information, please contact us on info@ac6-training.com.
Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.
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This course can be provided either remotely, in our Paris training center or worldwide on your premises.
Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.
Last update of course schedule: 27 June 2026
Booking one of our trainings is subject to our General Terms of Sales
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