Network
Courses on Ethernet and switches
From best effort to determinism
A switch introduces queuing, and queuing introduces jitter. A frame that normally crosses a network in fifty microseconds can take a millisecond when a burst arrives at the same port. For a web page nobody notices. For a motion control loop it is a fault.
That is where switch architecture stops being an implementation detail: store-and-forward against cut-through, buffer sizing, priority queues, and how a switch behaves when it is saturated.
IEEE 1588, Precision Time Protocol, solves the other half. It distributes a common clock across the network to sub-microsecond accuracy by measuring path delay rather than assuming it. It is what allows separate devices to sample, act or timestamp together, and it is the foundation of most time-sensitive networking.
What the courses cover
Ethernet and switching (N1) covers frames, switching, VLANs and the queuing behaviour that decides real latency. IEEE1588 Precise Time Protocol (N2) covers clock distribution, master selection, delay measurement and the hardware timestamping that makes accuracy possible. Ethernet 10 Gigabit (N3) covers the physical layers and the constraints that appear once a single link outruns the processor behind it.