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DSI 1.1

This course covers the Display Serial Interface V1.1 (DSI 1.1)

Objectives

  • The course starts with an overview of MIPI specification.
  • The layers are described using a bottom-top approach, starting with D-PHY and ending with DSI.
  • Forward and Reverse capabilities of a D-PHY are studied.
  • The course details the electrical characteristics of D-PHY.
  • Access to configuration and status registers through Reverse direction is covered.
  • Multi-lane distribution and merging of packets is explained.
  • The course focuses on the low level protocol, based on short and long packets used to transport images, embedded data and framing informations.
  • Data formats and possible compression of raw data is detailed to understand how the long packet payload is organized.
  • Companies interested in attending this course must adhere to MIPI organization.
  • This course has been designed for engineers in charge of SoC architecture, functional verification or silicon validation.

A more detailed course description is available on request at training@ac6-training.com
  • Basic knowledge on video transport.
  • Theoretical course
    • PDF material in English (printed for face-to-face); online over Teams.
    • Trainer assistance throughout.
  • Each session starts with a trainee check-in.
  • Any embedded systems engineer or technician with the above prerequisites.
  • Prerequisites are checked before the course starts, against the prerequisites published on this page.
  • Throughout the course, learning is assessed continuously: end-of-section quizzes and direct observation by the trainer.
  • At the end of the course, each participant receives a training completion certificate.

Course Outline

  • Universal lane module architecture
  • Control character usage
  • Uni-directional data lanes
  • Bi-directional data lanes, turnaround procedure
  • Clock lane
  • High-Speed data transmission in bursts
  • System power states
  • Low power states, escape mode
  • Low power data transmission
  • High-Speed clock transmission
  • Fault detection
  • Display architecture
  • Power level definition
  • Self-diagnostic functions
  • Command description
  • Pixel-to-byte mapping
  • Overview
  • Physical layer, flow control
  • Multi-Lane Distribution and Merging
  • Low-Level Protocol Errors and Contention
  • DSI protocol
  • DSI conformance test suite
  • DSI interoperability test suite
Duration
1 day
Inquiry

This course can be scheduled upon request. Click the 'Inquire' button to contact us.

Pricing

Courses are quoted individually, with no list price. The price depends on the duration, the number of participants, the delivery mode and the technical resources provided.

For more information on our pricing, see more.

More

To book a training session or for more information, please contact us on info@ac6-training.com.

Registrations are accepted till one week before the start date for scheduled classes. For late registrations, please consult us.

You can also fill and send us the registration form

This course can be provided either remotely, in our Paris training center or worldwide on your premises.

Scheduled classes are confirmed as soon as there is two confirmed bookings. Bookings are accepted until 1 week before the course start.

Last update of course schedule: 27 June 2026

Booking one of our trainings is subject to our General Terms of Sales

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